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Atlasresearch

Workspace

WorkspacePokedexHPC MapPortfolioCalendarTaiwan RevenueMemory
Calculators
  • 01AI Factory
  • 02CPO Stack
  • 03HBM Bridge
  • 04GPU Cloud TCO
  • 05Inference Tokens
  • 06Power Bottleneck
  • 07Custom ASIC
  • 08OCS TAM
  • 09N3 Allocation
  • 10Optical TAM
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Calculators/N3 Allocation

Jason's Chips

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Inputs

N3 supply

Smartphone release valve

Downstream gates

Program demand

RubinN3P
TPUN3E / N3P
Trn3N3P
AMDN3 / N3P
NetworkN3 family

Last calculated: Not yet

Calculator 09N3 front-end allocation

N3 Allocation Bottleneck Calculator

Convert TSMC N3 wafer supply, smartphone reallocation, AI program demand, HBM stacks, and advanced package capacity into fulfilled accelerator shipments, shortfalls, and foundry revenue.

Sensitivity

Available AI N3 wafers

715K

936K wafers required by selected AI programs

N3 wafer shortfall

221K

76% of requested front-end wafer demand covered

System-feasible units

7.11M

8.38M front-end fulfilled before HBM/package gates

Phone release wafers

43.7K

243K Rubin-equivalent or 599K TPU-equivalent units

Binding bottleneck

N3 front-end

85% package coverage, 100% HBM coverage

Foundry revenue

$16.51B

$23.1K average allocated wafer ASP

Allocation bridge

From N3 output to AI silicon shipped

Base AI allocation

638K

58% of N3 nameplate

Phone release

43.7K

10% of smartphone N3 pool

Utilization lift

33.0K

Effective output above nameplate

AI wafer pool

715K

65% of N3 output before external relief

Shortfall

221K

Demand above allocation

ProgramRequestedRequired wafersAllocated wafersFulfilled unitsShortfallHBM stacksFoundry revenue
NVIDIA Rubin GPUNVIDIA | N3P | priority 1002.00M360K296K1.64M358K13.1M$7.09B
Google TPU v7/v8Google | N3E / N3P | priority 954.50M329K256K3.51M990K28.1M$5.76B
AWS Trainium3AWS | N3P | priority 882.20M99.0K71.5K1.59M611K6.36M$1.57B
AMD MI350/MI400AMD | N3 / N3P | priority 72900K108K63.8K532K368K4.26M$1.50B
AI networking siliconSwitch / DSP | N3 family | priority 841.60M40.0K27.6K1.10M497K0$579M

Program pressure

Which programs consume the N3 pool

Rubin

360K

1.64M fulfilled at 82% front-end coverage.

TPU

329K

3.51M fulfilled at 78% front-end coverage.

Trn3

99.0K

1.59M fulfilled at 72% front-end coverage.

AMD

108K

532K fulfilled at 59% front-end coverage.

Network

40.0K

1.10M fulfilled at 69% front-end coverage.

Downstream gating

N3 is not the only shipment constraint

N3 front-end

76%

936K wafers requested

Packages

85%

1.16M unit shortfall

HBM stacks

100%

0 stack shortfall

Read-through

Total requested units11.2M
Front-end fulfilled units8.38M
System feasible units7.11M
HBM stacks needed51.8M
Advanced packages needed7.66M

Sensitivity

Smartphone reallocation vs AI share

Phone / AI share48%58% base68%78%
0%375K265K155K44.5K
10% base331K221K111K800
20%287K177K67.1K0
30%243K133K23.4K0

Preset comparison

Built-in allocation cases

CaseAI wafersShortfallFeasible unitsBottleneckRevenue
CY26 squeezeAI demand moves onto N3 before consumer demand fully releases.715K221K7.11MN3 front-end$16.51B
CY27 crowd-outAI wafers approach the overwhelming majority of N3 output.1.29M210K11.4MAdvanced packaging$29.12B
Phone releaseA weak handset cycle releases meaningful N3 starts to AI customers.780K155K7.87MN3 front-end$18.03B
HBM gateFoundry supply improves, but HBM stack supply becomes the binding gate.990K170K6.79MHBM stacks$22.42B

Saved scenarios

3/5

CY26 N3 squeeze

Seed

220K

Feasible

7.15M

Revenue

$16.20B

CY27 AI crowd-out

Seed

0

Feasible

12.9M

Revenue

$43.80B

Smartphone release

Seed

155K

Feasible

7.90M

Revenue

$18.50B